A first in first out (FIFO) buffer is an electronic circuit for buffering and flow control of data. The FIFO buffer primarily includes a read pointer, a write pointer, a storage, and a control logic. The read pointer is used to point an address in the storage so that the content of the address can be accessed. The write pointer is used to point another address in the storage to store an incoming data. The storage may be a static random access memory (SRAM), flip-flops, latches, or any other suitable form of storage. The control logic performs necessary read and write pointer management, generates status flags and/or optional handshake signals.
During a read operation of the FIFO buffer, the header of the data (e.g., a data packet) is read to check the validity of the data. If the data is valid, it is further processed. However, even if the data is invalid, the FIFO buffer executes the read operation of the invalid data by means of dummy reads, thus causing latency of the read operation as well as wasting processing cycles of the firmware employed for the FIFO read operation.